# Copyright (c) 2023 Rivos Inc.
# SPDX-License-Identifier: Apache-2.0

config SOC_OPENTITAN
	select ATOMIC_OPERATIONS_C
	select INCLUDE_RESET_VECTOR
	select RISCV_ISA_RV32I
	select RISCV_ISA_EXT_M
	select RISCV_ISA_EXT_C
	select RISCV_ISA_EXT_ZICSR
	select RISCV_ISA_EXT_ZIFENCEI
	select RISCV_ISA_EXT_ZBA
	select RISCV_ISA_EXT_ZBB
	select RISCV_ISA_EXT_ZBC
	select RISCV_ISA_EXT_ZBS
	select RISCV
	select RISCV_PRIVILEGED
	select RISCV_HAS_PLIC
	select RISCV_SOC_HAS_GP_RELATIVE_ADDRESSING
	# OpenTitan Ibex core mtvec mode is read-only / forced to vectored mode.
	select RISCV_VECTORED_MODE
	select GEN_IRQ_VECTOR_TABLE
	imply XIP
	select SOC_EARLY_INIT_HOOK
