# Release Notes for

# STM32L5xx CMSIS

Copyright © 2019 STMicroelectronics

# Purpose

This driver provides the CMSIS device for the STM32L5 products. This covers STM32L552xx/STM32L5622x devices.

This driver is composed of the descriptions of the registers under “Include” directory.

Various template file are provided to easily build an application. They can be adapted to fit applications requirements.

- Include/Templates/partition_stm32l552xx.h and partition_stm32l562xx.h contain a default Secure Attribute Unit (SAU) set up from SystemInit() for secure application when the TrustZone-M security is enabled (TZEN=1).
- Source/Templates/system_stm32l5xx.c contains the initialization code referred as SystemInit() when there is no TrustZone-M security enabled (TZEN=0).
- Source/Templates/system_stm32l5xx_s.c contains the initialization code referred as SystemInit() for secure application when the TrustZone-M security is enabled (TZEN=1).
- Source/Templates/system_stm32l5xx_ns.c contains the initialization code referred as SystemInit() for non-secure application when the TrustZone-M security is enabled (TZEN=1).
- Startup files are provided as example for IAR, KEIL and STM32CubeIDE.
- Linker files are provided as example for IAR, KEIL and STM32CubeIDE.

# Update History

V1.0.7 / 29-October-2025

## Main Changes

Maintenance release

## Contents

- Fix Capture Compare register TIMx_CCR5 definition.
- Allow redefinition of the macro ‘VECT_TAB_OFFSET’ externally from the IDE, makefile, or command line.
- Update core_cm33 header file inclusion to use double quotes instead of angle brackets.

## Notes

Reminder:

- When TrustZone is enabled in the system (Flash option bit TZEN=1)
  - template device partition_stm32l552xx.h or partition_stm32l562xx.h file must be copied and optionally updated in user application secure project to configure the system (SAU, interrupts, core).
  - default Security Attribute Unit (SAU) configuration in the partition_stm32l552xx.h and partition_stm32l562xx.h:
    - SAU region 0: 0x0C03E000-0x0C03FFFF (Secure, Non-Secure Callable)
    - SAU region 1: 0x08040000-0x0807FFFF (Non-Secure FLASH Bank2 (256 Kbytes))
    - SAU region 2: 0x20018000-0x2003FFFF (Non-Secure RAM (2nd half SRAM1 + SRAM2 (160 Kbytes)))
    - SAU region 3: 0x40000000-0x4FFFFFFF (Non-Secure Peripheral mapped memory)
    - SAU region 4: 0x60000000-0x9FFFFFFF (Non-Secure external memories)
    - SAU region 5: 0x0BF90000-0x0BFA8FFF (Non-Secure System memory)

V1.0.6 / 09-February-2024

## Main Changes

Maintenance release

## Contents

- Fix the location of .size directive in STM32CubeIDE’s startup code to allow proper size information of vector table.
- Add the READONLY tag to sections containing lookup tables to avoid GCC12 linker warnings if a segment is marked RWX.

## Notes

Reminder:

- When TrustZone is enabled in the system (Flash option bit TZEN=1)
  - template device partition_stm32l552xx.h or partition_stm32l562xx.h file must be copied and optionally updated in user application secure project to configure the system (SAU, interrupts, core).
  - default Security Attribute Unit (SAU) configuration in the partition_stm32l552xx.h and partition_stm32l562xx.h:
    - SAU region 0: 0x0C03E000-0x0C03FFFF (Secure, Non-Secure Callable)
    - SAU region 1: 0x08040000-0x0807FFFF (Non-Secure FLASH Bank2 (256 Kbytes))
    - SAU region 2: 0x20018000-0x2003FFFF (Non-Secure RAM (2nd half SRAM1 + SRAM2 (160 Kbytes)))
    - SAU region 3: 0x40000000-0x4FFFFFFF (Non-Secure Peripheral mapped memory)
    - SAU region 4: 0x60000000-0x9FFFFFFF (Non-Secure external memories)
    - SAU region 5: 0x0BF90000-0x0BFA8FFF (Non-Secure System memory)

V1.0.5 / 04-November-2022

## Main Changes

Maintenance release

## Contents

- General updates to fix known defects and implementation enhancements.
- All source files: update disclaimer to add reference to the new license agreement.
- Add new atomic register access macros in stm32l5xx.h file.
- Update to fix compilation error “-Werror=undef” with ARMCC version.
- Add missing parameter after @param in order to fix warning in generated documentation
- Change addresses of ROM symbols in sram.icf template files to code region alias in order to increase performance while running code from SRAM

## Notes

Reminder:

- When TrustZone is enabled in the system (Flash option bit TZEN=1)
  - template device partition_stm32l552xx.h or partition_stm32l562xx.h file must be copied and optionally updated in user application secure project to configure the system (SAU, interrupts, core).
  - default Security Attribute Unit (SAU) configuration in the partition_stm32l552xx.h and partition_stm32l562xx.h:
    - SAU region 0: 0x0C03E000-0x0C03FFFF (Secure, Non-Secure Callable)
    - SAU region 1: 0x08040000-0x0807FFFF (Non-Secure FLASH Bank2 (256 Kbytes))
    - SAU region 2: 0x20018000-0x2003FFFF (Non-Secure RAM (2nd half SRAM1 + SRAM2 (160 Kbytes)))
    - SAU region 3: 0x40000000-0x4FFFFFFF (Non-Secure Peripheral mapped memory)
    - SAU region 4: 0x60000000-0x9FFFFFFF (Non-Secure external memories)
    - SAU region 5: 0x0BF90000-0x0BFA8FFF (Non-Secure System memory)

V1.0.4 / 10-February-2021

## Main Changes

Maintenance release

## Contents

Maintenance release of STM32L5xx CMSIS Device drivers to support STM32L552xx and STM32L562xx devices

- stm32l552xx.h and stm32l562xx.h updates
  - Add TAMP_CFGR configuration register and definitions for TMONEN, VMONEN and WUTMONEN monitoring functions
  - Fix I2C4_EV_IRQn and I2C4_ER_IRQn order in IRQn_Type

## Notes

Reminder:

- When TrustZone is enabled in the system (Flash option bit TZEN=1)
  - template device partition_stm32l552xx.h or partition_stm32l562xx.h file must be copied and optionally updated in user application secure project to configure the system (SAU, interrupts, core).
  - default Security Attribute Unit (SAU) configuration in the partition_stm32l552xx.h and partition_stm32l562xx.h:
    - SAU region 0: 0x0C03E000-0x0C03FFFF (Secure, Non-Secure Callable)
    - SAU region 1: 0x08040000-0x0807FFFF (Non-Secure FLASH Bank2 (256 Kbytes))
    - SAU region 2: 0x20018000-0x2003FFFF (Non-Secure RAM (2nd half SRAM1 + SRAM2 (160 Kbytes)))
    - SAU region 3: 0x40000000-0x4FFFFFFF (Non-Secure Peripheral mapped memory)
    - SAU region 4: 0x60000000-0x9FFFFFFF (Non-Secure external memories)
    - SAU region 5: 0x0BF90000-0x0BFA8FFF (Non-Secure System memory)

V1.0.3 / 26-June-2020

## Main Changes

Fourth release

## Contents

Fourth release of STM32L5xx CMSIS Device drivers to support STM32L552xx and STM32L562xx devices

- stm32l552xx.h and stm32l562xx.h updates
  - Fix ICACHE_FCR_CERRF bit definition
  - Align DBGMCU_CR register and bits definitions with RM0438 revision 5
  - Cleanup RCC_CFGR_* definitions to keep only bits definitions
- Templates\gcc\startup_stm32l552xx.s and startup_stm32l562xx.s
  - Call SystemInit() before RAM initialization in startup/Reset_Handler
- Add README.md and License.md files for GitHub publication
- Misspelled words corrections in driver descriptions

## Notes

Reminder:

- When TrustZone is enabled in the system (Flash option bit TZEN=1)
  - template device partition_stm32l552xx.h or partition_stm32l562xx.h file must be copied and optionally updated in user application secure project to configure the system (SAU, interrupts, core).
  - default Security Attribute Unit (SAU) configuration in the partition_stm32l552xx.h and partition_stm32l562xx.h:
    - SAU region 0: 0x0C03E000-0x0C03FFFF (Secure, Non-Secure Callable)
    - SAU region 1: 0x08040000-0x0807FFFF (Non-Secure FLASH Bank2 (256 Kbytes))
    - SAU region 2: 0x20018000-0x2003FFFF (Non-Secure RAM (2nd half SRAM1 + SRAM2 (160 Kbytes)))
    - SAU region 3: 0x40000000-0x4FFFFFFF (Non-Secure Peripheral mapped memory)
    - SAU region 4: 0x60000000-0x9FFFFFFF (Non-Secure external memories)
    - SAU region 5: 0x0BF90000-0x0BFA8FFF (Non-Secure System memory)

V1.0.2 / 12-February-2020

## Main Changes

Third release

## Contents

Third official release of STM32L5xx CMSIS Device drivers to support STM32L552xx and STM32L562xx devices

- stm32l552xx.h and stm32l562xx.h updates
  - Add root secure services library (RSSLIB) definitions
  - Add bootloader id address
  - Align DBGMCU_APB2FZR register and bits definitions with RM0438

## Notes

Reminder:

- When TrustZone is enabled in the system (Flash option bit TZEN=1)
  - template device partition_stm32l552xx.h or partition_stm32l562xx.h file must be copied and optionally updated in user application secure project to configure the system (SAU, interrupts, core).
  - default Security Attribute Unit (SAU) configuration in the partition_stm32l552xx.h and partition_stm32l562xx.h:
    - SAU region 0: 0x0C03E000-0x0C03FFFF (Secure, Non-Secure Callable)
    - SAU region 1: 0x08040000-0x0807FFFF (Non-Secure FLASH Bank2 (256 Kbytes))
    - SAU region 2: 0x20018000-0x2003FFFF (Non-Secure RAM (2nd half SRAM1 + SRAM2 (160 Kbytes)))
    - SAU region 3: 0x40000000-0x4FFFFFFF (Non-Secure Peripheral mapped memory)
    - SAU region 4: 0x60000000-0x9FFFFFFF (Non-Secure external memories)
    - SAU region 5: 0x0BF90000-0x0BFA8FFF (Non-Secure System memory)

V1.0.1 / 22-January-2020

## Main Changes

Second release

## Contents

Second official release of STM32L5xx CMSIS Device drivers to support STM32L552xx and STM32L562xx devices

- Templates system_stm32l5xx.c, system_stm32l5xx_s.c and system_stm32l5xx_ns.c
  - Add vector table relocation capability with conditional USER_VECT_TAB_ADDRESS

## Notes

Reminder:

- When TrustZone is enabled in the system (Flash option bit TZEN=1)
  - template device partition_stm32l552xx.h or partition_stm32l562xx.h file must be copied and optionally updated in user application secure project to configure the system (SAU, interrupts, core).
  - default Security Attribute Unit (SAU) configuration in the partition_stm32l552xx.h and partition_stm32l562xx.h:
    - SAU region 0: 0x0C03E000-0x0C03FFFF (Secure, Non-Secure Callable)
    - SAU region 1: 0x08040000-0x0807FFFF (Non-Secure FLASH Bank2 (256 Kbytes))
    - SAU region 2: 0x20018000-0x2003FFFF (Non-Secure RAM (2nd half SRAM1 + SRAM2 (160 Kbytes)))
    - SAU region 3: 0x40000000-0x4FFFFFFF (Non-Secure Peripheral mapped memory)
    - SAU region 4: 0x60000000-0x9FFFFFFF (Non-Secure external memories)
    - SAU region 5: 0x0BF90000-0x0BFA8FFF (Non-Secure System memory)

V1.0.0 / 13-December-2019

## Main Changes

First release

## Contents

First official release of STM32L5xx CMSIS Device drivers to support STM32L552xx and STM32L562xx devices

- Templates
  - When TrustZone security is enabled in the system (Flash option bit TZEN=1), the partition_stm32l552xx.h and partition_stm32l562xx.h are available from \Include\Templates with a default Security Attribute Unit (SAU) configuration:
    - SAU region 0: 0x0C03E000-0x0C03FFFF (Secure, Non-Secure Callable)
    - SAU region 1: 0x08040000-0x0807FFFF (Non-Secure FLASH Bank2 (256 Kbytes))
    - SAU region 2: 0x20018000-0x2003FFFF (Non-Secure RAM (2nd half SRAM1 + SRAM2 (160 Kbytes)))
    - SAU region 3: 0x40000000-0x4FFFFFFF (Non-Secure Peripheral mapped memory)
    - SAU region 4: 0x60000000-0x9FFFFFFF (Non-Secure external memories)
    - SAU region 5: 0x0BF90000-0x0BFA8FFF (Non-Secure System memory)
  - system_stm32l5xx_s.c and system_stm32l5xx_ns.c for respectively secure application and non-secure application when TrustZone security is enabled (TZEN=1)
  - Linker files for 256 and 512 Kbytes Flash device configurations

## Notes

When TrustZone is enabled in the system (Flash option bit TZEN=1), template device partition_stm32l552xx.h or partition_stm32l562xx.h file must be copied and optionally updated in user application secure project to configure the system (SAU, interrupts, core)