Xilinx PL Display driver
------------------------

Pl_Display is a logical device to provide completeness to xilinx display
pipeline. This is a software driver for providing drm components crtc
and plane for various IPs using xilinx display pipelines.

A linear pipeline with multiple blocks:
DMA --> PL_Display --> SDI

Required properties:

- compatible: Must be "xlnx,pl-disp"
- dmas: dma attach to pipeline
- dma-names: names for dma
- memory-region: phandle to /reserved-memory node.
  If memory is reserved for special use by PL display then this node
  can be used to refer and use from this reserved memory region.
- xlnx,vformat: video format for layer
- port: Logical block can be used / connected independently with
  external device. In the display controller port nodes, topology
  for entire pipeline should be described using the DT bindings defined in
  Documentation/devicetree/bindings/graph.txt.
- reg: Base address and size of device

Optional properties:
 - xlnx,bridge: bridge phandle
   This handle is required only when VTC is connected as bridge.

Example:

	drm-pl-disp-drv {
		compatible = "xlnx,pl-disp";
		dmas = <&axi_vdma_0 0>;
		dma-names = "dma0";
		xlnx,vformat = "YUYV";
		xlnx,bridge = <&v_tc_0>;
		pl_disp_port@0 {
			reg = <0>;
			endpoint {
				remote-endpoint = <&sdi_port>;
			};
		};
	};
Example using reserved memory:
Reserving from 32bit Shared CMA pool of 512MiB using System RAM:
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
/ {
	reserved-memory {
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		ranges;
		psmem_multimedia: multimedia_cma_mem_region {
			compatible = "shared-dma-pool";
			reg = <0x00 0x40000000 0x00 0x20000000>;
			reusable;
		};
	};
};
...
	drm-pl-disp-drv {
		/* ... */
		memory-region = <&psmem_multimedia>;
	};

Reserving from 64bit Shared DMA pool of 1792 MiB using external PL based
DDR memory:
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
/ {
	reserved-memory {
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		ranges;
		plmem_multimedia: multimedia_dma_mem_region {
			compatible = "shared-dma-pool";
			no-map;
			reg = <0x500 0x00 0x00 0x70000000>;
		};
	};

};
...
	drm-pl-disp-drv {
		/* ... */
		memory-region = <&plmem_multimedia>;
	}
