 arch	  circuit	  script_params	  vtr_flow_elapsed_time	  vtr_max_mem_stage	  vtr_max_mem	  error	  odin_synth_time	  max_odin_mem	  parmys_synth_time	  max_parmys_mem	  abc_depth	  abc_synth_time	  abc_cec_time	  abc_sec_time	  max_abc_mem	  ace_time	  max_ace_mem	  num_clb	  num_io	  num_memories	  num_mult	  vpr_status	  vpr_revision	  vpr_build_info	  vpr_compiler	  vpr_compiled	  hostname	  rundir	  max_vpr_mem	  num_primary_inputs	  num_primary_outputs	  num_pre_packed_nets	  num_pre_packed_blocks	  num_netlist_clocks	  num_post_packed_nets	  num_post_packed_blocks	  device_width	  device_height	  device_grid_tiles	  device_limiting_resources	  device_name	  pack_mem	  pack_time	  placed_wirelength_est	  total_swap	  accepted_swap	  rejected_swap	  aborted_swap	  place_mem	  place_time	  place_quench_time	  placed_CPD_est	  placed_setup_TNS_est	  placed_setup_WNS_est	  placed_geomean_nonvirtual_intradomain_critical_path_delay_est	  place_delay_matrix_lookup_time	  place_quench_timing_analysis_time	  place_quench_sta_time	  place_total_timing_analysis_time	  place_total_sta_time	  ap_mem	  ap_time	  ap_full_legalizer_mem	  ap_full_legalizer_time	  min_chan_width	  routed_wirelength	  min_chan_width_route_success_iteration	  logic_block_area_total	  logic_block_area_used	  min_chan_width_routing_area_total	  min_chan_width_routing_area_per_tile	  min_chan_width_route_time	  min_chan_width_total_timing_analysis_time	  min_chan_width_total_sta_time	  crit_path_num_rr_graph_nodes	  crit_path_num_rr_graph_edges	  crit_path_collapsed_nodes	  crit_path_routed_wirelength	  crit_path_route_success_iteration	  crit_path_total_nets_routed	  crit_path_total_connections_routed	  crit_path_total_heap_pushes	  crit_path_total_heap_pops	  critical_path_delay	  geomean_nonvirtual_intradomain_critical_path_delay	  setup_TNS	  setup_WNS	  hold_TNS	  hold_WNS	  crit_path_routing_area_total	  crit_path_routing_area_per_tile	  router_lookahead_computation_time	  crit_path_route_time	  crit_path_create_rr_graph_time	  crit_path_create_intra_cluster_rr_graph_time	  crit_path_tile_lookahead_computation_time	  crit_path_router_lookahead_computation_time	  crit_path_total_timing_analysis_time	  crit_path_total_sta_time	 
 stratixiv_arch.timing.xml	  styr.blif	  common_--place_delay_model_delta_--place_delta_delay_matrix_calculation_method_astar	  35.27	  vpr	  975.84 MiB	  	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  10	  -1	  -1	  success	  v8.0.0-11920-g63becbef4-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 9.4.0 on Linux-4.15.0-213-generic x86_64	  2024-12-04T15:29:41	  betzgrp-wintermute.eecg.utoronto.ca	  /home/elgamma8/research/release/vtr-verilog-to-routing	  999256	  10	  10	  168	  178	  1	  68	  30	  11	  8	  88	  io	  auto	  952.8 MiB	  0.51	  367	  858	  86	  706	  66	  975.8 MiB	  0.08	  0.00	  6.45248	  -68.9386	  -6.45248	  6.45248	  2.72	  0.000641971	  0.000592935	  0.0159015	  0.0148445	  -1	  -1	  -1	  -1	  20	  921	  38	  0	  0	  100248.	  1139.18	  1.43	  0.224644	  0.190596	  11180	  23751	  -1	  744	  15	  370	  1263	  78537	  40193	  6.94856	  6.94856	  -75.747	  -6.94856	  0	  0	  125464.	  1425.72	  0.01	  0.07	  0.07	  -1	  -1	  0.01	  0.0260004	  0.0232585	 
 stratixiv_arch.timing.xml	  styr.blif	  common_--place_delay_model_delta_override_--place_delta_delay_matrix_calculation_method_astar	  33.04	  vpr	  975.93 MiB	  	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  10	  -1	  -1	  success	  v8.0.0-11920-g63becbef4-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 9.4.0 on Linux-4.15.0-213-generic x86_64	  2024-12-04T15:29:41	  betzgrp-wintermute.eecg.utoronto.ca	  /home/elgamma8/research/release/vtr-verilog-to-routing	  999352	  10	  10	  168	  178	  1	  68	  30	  11	  8	  88	  io	  auto	  953.0 MiB	  0.51	  369	  812	  82	  656	  74	  975.9 MiB	  0.08	  0.00	  6.45248	  -69.2479	  -6.45248	  6.45248	  2.73	  0.000637093	  0.000588521	  0.0150494	  0.014069	  -1	  -1	  -1	  -1	  32	  700	  42	  0	  0	  153433.	  1743.56	  0.48	  0.115634	  0.0996693	  11830	  34246	  -1	  553	  12	  224	  697	  51911	  24100	  6.94346	  6.94346	  -73.4811	  -6.94346	  0	  0	  205860.	  2339.32	  0.01	  0.06	  0.10	  -1	  -1	  0.01	  0.0238694	  0.0215444	 
 stratixiv_arch.timing.xml	  styr.blif	  common_--place_delay_model_delta_--place_delta_delay_matrix_calculation_method_dijkstra	  35.18	  vpr	  975.89 MiB	  	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  10	  -1	  -1	  success	  v8.0.0-11920-g63becbef4-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 9.4.0 on Linux-4.15.0-213-generic x86_64	  2024-12-04T15:29:41	  betzgrp-wintermute.eecg.utoronto.ca	  /home/elgamma8/research/release/vtr-verilog-to-routing	  999308	  10	  10	  168	  178	  1	  68	  30	  11	  8	  88	  io	  auto	  953.0 MiB	  0.50	  370	  812	  89	  663	  60	  975.9 MiB	  0.08	  0.00	  6.52191	  -68.7563	  -6.52191	  6.52191	  3.58	  0.000643763	  0.000590538	  0.0152136	  0.0141975	  -1	  -1	  -1	  -1	  22	  772	  16	  0	  0	  110609.	  1256.92	  0.45	  0.0911039	  0.0790398	  11258	  24748	  -1	  661	  16	  334	  1199	  69249	  36303	  7.07727	  7.07727	  -76.5253	  -7.07727	  0	  0	  134428.	  1527.59	  0.01	  0.08	  0.07	  -1	  -1	  0.01	  0.0291321	  0.0261889	 
 stratixiv_arch.timing.xml	  styr.blif	  common_--place_delay_model_delta_override_--place_delta_delay_matrix_calculation_method_dijkstra	  34.68	  vpr	  975.90 MiB	  	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  10	  -1	  -1	  success	  v8.0.0-11920-g63becbef4-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 9.4.0 on Linux-4.15.0-213-generic x86_64	  2024-12-04T15:29:41	  betzgrp-wintermute.eecg.utoronto.ca	  /home/elgamma8/research/release/vtr-verilog-to-routing	  999324	  10	  10	  168	  178	  1	  68	  30	  11	  8	  88	  io	  auto	  952.9 MiB	  0.51	  368	  812	  95	  656	  61	  975.9 MiB	  0.11	  0.00	  6.34478	  -68.8031	  -6.34478	  6.34478	  3.63	  0.000638453	  0.000590562	  0.0154569	  0.0144665	  -1	  -1	  -1	  -1	  28	  758	  26	  0	  0	  134428.	  1527.59	  0.51	  0.102179	  0.0885661	  11590	  29630	  -1	  624	  15	  260	  959	  55440	  26515	  6.64742	  6.64742	  -72.827	  -6.64742	  0	  0	  173354.	  1969.93	  0.01	  0.07	  0.09	  -1	  -1	  0.01	  0.0265072	  0.0237256	 
