 arch	  circuit	  script_params	  vtr_flow_elapsed_time	  vtr_max_mem_stage	  vtr_max_mem	  error	  odin_synth_time	  max_odin_mem	  parmys_synth_time	  max_parmys_mem	  abc_depth	  abc_synth_time	  abc_cec_time	  abc_sec_time	  max_abc_mem	  ace_time	  max_ace_mem	  num_clb	  num_io	  num_memories	  num_mult	  vpr_status	  vpr_revision	  vpr_build_info	  vpr_compiler	  vpr_compiled	  hostname	  rundir	  max_vpr_mem	  num_primary_inputs	  num_primary_outputs	  num_pre_packed_nets	  num_pre_packed_blocks	  num_netlist_clocks	  num_post_packed_nets	  num_post_packed_blocks	  device_width	  device_height	  device_grid_tiles	  device_limiting_resources	  device_name	  pack_mem	  pack_time	  placed_wirelength_est	  total_swap	  accepted_swap	  rejected_swap	  aborted_swap	  place_mem	  place_time	  place_quench_time	  placed_CPD_est	  placed_setup_TNS_est	  placed_setup_WNS_est	  placed_geomean_nonvirtual_intradomain_critical_path_delay_est	  place_delay_matrix_lookup_time	  place_quench_timing_analysis_time	  place_quench_sta_time	  place_total_timing_analysis_time	  place_total_sta_time	  ap_mem	  ap_time	  ap_full_legalizer_mem	  ap_full_legalizer_time	  min_chan_width	  routed_wirelength	  min_chan_width_route_success_iteration	  logic_block_area_total	  logic_block_area_used	  min_chan_width_routing_area_total	  min_chan_width_routing_area_per_tile	  min_chan_width_route_time	  min_chan_width_total_timing_analysis_time	  min_chan_width_total_sta_time	  crit_path_num_rr_graph_nodes	  crit_path_num_rr_graph_edges	  crit_path_collapsed_nodes	  crit_path_routed_wirelength	  crit_path_route_success_iteration	  crit_path_total_nets_routed	  crit_path_total_connections_routed	  crit_path_total_heap_pushes	  crit_path_total_heap_pops	  critical_path_delay	  geomean_nonvirtual_intradomain_critical_path_delay	  setup_TNS	  setup_WNS	  hold_TNS	  hold_WNS	  crit_path_routing_area_total	  crit_path_routing_area_per_tile	  router_lookahead_computation_time	  crit_path_route_time	  crit_path_create_rr_graph_time	  crit_path_create_intra_cluster_rr_graph_time	  crit_path_tile_lookahead_computation_time	  crit_path_router_lookahead_computation_time	  crit_path_total_timing_analysis_time	  crit_path_total_sta_time	 
 k4_n4_v7_bidir.xml	  styr.blif	  common	  2.49	  vpr	  58.58 MiB	  	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  69	  10	  -1	  -1	  success	  v8.0.0-11852-g026644d7f-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 9.4.0 on Linux-4.15.0-213-generic x86_64	  2024-11-21T16:04:00	  betzgrp-wintermute.eecg.utoronto.ca	  /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing	  59988	  10	  10	  253	  263	  1	  165	  89	  11	  11	  121	  clb	  auto	  18.8 MiB	  0.05	  1298	  4445	  695	  3556	  194	  58.6 MiB	  0.05	  0.00	  5.53812	  -72.6437	  -5.53812	  5.53812	  0.17	  0.000586889	  0.000523181	  0.0184266	  0.016854	  -1	  -1	  -1	  -1	  14	  2029	  36	  2.43e+06	  2.07e+06	  -1	  -1	  1.20	  0.252134	  0.219147	  3402	  27531	  -1	  1944	  19	  1218	  4569	  249188	  30978	  7.47374	  7.47374	  -94.8537	  -7.47374	  0	  0	  -1	  -1	  0.06	  0.11	  0.02	  -1	  -1	  0.06	  0.0414153	  0.0362194	 
 k4_n4_v7_longline_bidir.xml	  styr.blif	  common	  2.81	  vpr	  58.10 MiB	  	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  69	  10	  -1	  -1	  success	  v8.0.0-11852-g026644d7f-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 9.4.0 on Linux-4.15.0-213-generic x86_64	  2024-11-21T16:04:00	  betzgrp-wintermute.eecg.utoronto.ca	  /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing	  59496	  10	  10	  253	  263	  1	  165	  89	  11	  11	  121	  clb	  auto	  18.9 MiB	  0.06	  1243	  3851	  530	  3175	  146	  58.1 MiB	  0.04	  0.00	  4.42129	  -53.6285	  -4.42129	  4.42129	  0.23	  0.000610037	  0.000548673	  0.0158349	  0.0144995	  -1	  -1	  -1	  -1	  19	  2381	  26	  2.43e+06	  2.07e+06	  -1	  -1	  1.40	  0.224268	  0.192635	  3282	  34431	  -1	  2331	  24	  1499	  5264	  384444	  46394	  8.40637	  8.40637	  -105.933	  -8.40637	  0	  0	  -1	  -1	  0.07	  0.11	  0.02	  -1	  -1	  0.07	  0.0377239	  0.0326406	 
 k4_n4_v7_l1_bidir.xml	  styr.blif	  common	  4.06	  vpr	  58.64 MiB	  	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  69	  10	  -1	  -1	  success	  v8.0.0-11852-g026644d7f-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 9.4.0 on Linux-4.15.0-213-generic x86_64	  2024-11-21T16:04:00	  betzgrp-wintermute.eecg.utoronto.ca	  /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing	  60052	  10	  10	  253	  263	  1	  165	  89	  11	  11	  121	  clb	  auto	  18.9 MiB	  0.06	  1249	  6821	  1452	  5028	  341	  58.6 MiB	  0.06	  0.00	  6.30077	  -80.949	  -6.30077	  6.30077	  0.22	  0.000518755	  0.000463783	  0.0228285	  0.0206741	  -1	  -1	  -1	  -1	  10	  1483	  31	  2.43e+06	  2.07e+06	  -1	  -1	  2.61	  0.268076	  0.234279	  4482	  22551	  -1	  1280	  20	  1321	  4798	  303501	  58064	  7.52318	  7.52318	  -89.7629	  -7.52318	  0	  0	  -1	  -1	  0.04	  0.12	  0.02	  -1	  -1	  0.04	  0.037522	  0.0333295	 
 k4_n4_v7_bidir_pass_gate.xml	  styr.blif	  common	  3.10	  vpr	  58.02 MiB	  	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  69	  10	  -1	  -1	  success	  v8.0.0-11852-g026644d7f-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 9.4.0 on Linux-4.15.0-213-generic x86_64	  2024-11-21T16:04:00	  betzgrp-wintermute.eecg.utoronto.ca	  /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing	  59416	  10	  10	  253	  263	  1	  165	  89	  11	  11	  121	  clb	  auto	  18.8 MiB	  0.05	  1252	  4247	  601	  3492	  154	  58.0 MiB	  0.05	  0.00	  3.38007	  -43.5291	  -3.38007	  3.38007	  0.18	  0.00064054	  0.000577227	  0.0176541	  0.0161473	  -1	  -1	  -1	  -1	  14	  2047	  30	  2.43e+06	  2.07e+06	  -1	  -1	  1.68	  0.248457	  0.216641	  3402	  27531	  -1	  2099	  29	  1484	  5383	  889715	  156716	  22.7353	  22.7353	  -261.092	  -22.7353	  0	  0	  -1	  -1	  0.05	  0.25	  0.02	  -1	  -1	  0.05	  0.0493955	  0.0438566	 
