# Copyright (c) 2023 TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
# SPDX-License-Identifier: Apache-2.0

config SOC_SERIES_RA4M1
	select ARM
	select CPU_CORTEX_M4
	select CPU_HAS_ARM_MPU
	select HAS_RENESAS_RA_FSP
	select CLOCK_CONTROL_RENESAS_RA_CGC if CLOCK_CONTROL
	select CPU_CORTEX_M_HAS_DWT
	select CPU_HAS_FPU
	select FPU
	select HAS_SWO
	select XIP
	select GPIO_RA_HAS_VBTICTLR
	select SOC_RA_DYNAMIC_INTERRUPT_NUMBER

if SOC_SERIES_RA4M1

config SOC_OPTION_SETTING_MEMORY
	bool "Option Setting Memory"
	default y

config RENESAS_PN_PACKAGE_TYPE
	int
	range 1 7
	default 1 if SOC_R7FA4M1AB3CFP
	default 2 if SOC_R7FA4M1AB3CFM
	default 6 if SOC_R7FA4M1AB3CNE
	help
	  Package type:
	  1 -> FP: LQFP 100 pins
	  2 -> FM: LQFP 64 pins
	  3 -> FL: LQFP 48 pins
	  4 -> LJ: LGA 100 pins
	  5 -> NB: QFN 64 pins
	  6 -> NE: QFN 48 pins
	  7 -> NF: QFN 40 pins

endif
